Fixes are available
XL C/C++ for AIX Fix Pack 3 (April 2015 PTF) for 13.1
XL C/C++ for AIX Fix Pack 4 (July 2015 PTF) for 13.1
XL C for AIX Fix Pack 5 (November 2015 Update) for 13.1
XL C/C++ for AIX Fix Pack 5 (November 2015 PTF) for 13.1
XL C/C++ for AIX Fix Pack 6 (February 2016 PTF) for 13.1
XL C for AIX Fix Pack 6 (February 2016 Update) for 13.1
XL C for AIX Fix Pack 7 (May 2016 Update) for 13.1
XL C/C++ for AIX Fix Pack 7 (May 2016 PTF) for 13.1
XL C for AIX Fix Pack 8 (August 2016 Update) for 13.1
XL C/C++ for AIX Fix Pack 8 (August 2016 PTF) for 13.1
XL C for AIX Fix Pack 9 (June 2017 Update) for 13.1
XL C/C++ for AIX Fix Pack 9 (June 2017 PTF) for 13.1
XL C for AIX Fix Pack 10 (February 2018 Update) for 13.1
XL C/C++ for AIX Fix Pack 10 (February 2018 PTF) for 13.1
XL C for AIX Fix Pack 3 (April 2015 PTF) for 13.1
XL C for AIX Fix Pack 4 (July 2015 PTF) for 13.1
XL C/C++ for AIX Fix Pack 11 (November 2018 PTF) for 13.1
XL C for AIX Fix Pack 11 (November 2018) for 13.1
APAR status
Closed as program error.
Error description
The listing of the provided test case results in 2 instruction sequences. They could be automatically merge to single P8 instructions vorc, vnand veqv or its VSX pendants. ===== COMPILE COMMAND: xlC -q64 -O2 -qarch=pwr8 -qaltivec -qlist test.cpp -c ===== TESTCASE: $ cat test.cpp vector unsigned long long orcp7(vector unsigned long long a, vector unsigned long long b) { vector unsigned long long x = vec_nor(b,b); return vec_or(a,x); } vector unsigned long long eqvp7(vector unsigned long long a, vector unsigned long long b) { vector unsigned long long x = vec_xor(a,b); return vec_nor(x,x); } vector unsigned long long nandp7(vector unsigned long long a, vector unsigned long long b) { vector unsigned long long x = vec_and(a,b); return vec_nor(x,x); } $ ===== ACTUAL OUTPUT: VR's set/used: --su ---- ---- ---- ---- ---- ---- ---- | 000000 PDEF orcp7(vector unsigned long long, vector unsigned long long) | 000000 AKA orcp7__FayT1 1| PROC a,b,vs34,vs35 3| 000000 xxlnor F0031D16 1 VNOR vs0=vs35,vs35 4| 000004 xxlor F0420495 1 VOR vs34=vs34,vs0 5| 000008 bclr 4E800020 0 BA lr | Tag Table | 00000C 00000000 00092000 00000000 0000000C | Instruction count 3 | Straight-line exec time 2 GPR's set/used: ---- ---- ---- ---- ---- ---- ---- ---- FPR's set/used: s--- ---- ---- ---- ---- ---- ---- ---- CCR's set/used: ---- ---- VR's set/used: --su ---- ---- ---- ---- ---- ---- ---- | 000000 PDEF eqvp7(vector unsigned long long, vector unsigned long long) | 000000 AKA eqvp7__FayT1 7| PROC a,b,vs34,vs35 9| 00001C xxlxor F0021CD6 1 VXOR vs0=vs34,vs35 10| 000020 xxlnor F0400511 1 VNOR vs34=vs0,vs0 11| 000024 bclr 4E800020 0 BA lr | Tag Table | 000028 00000000 00092000 00000000 0000000C | Instruction count 3 | Straight-line exec time 2 GPR's set/used: ---- ---- ---- ---- ---- ---- ---- ---- FPR's set/used: s--- ---- ---- ---- ---- ---- ---- ---- CCR's set/used: ---- ---- VR's set/used: --su ---- ---- ---- ---- ---- ---- ---- | 000000 PDEF nandp7(vector unsigned long long, vector unsigned long long) | 000000 AKA nandp7__FayT1 13| PROC a,b,vs34,vs35 15| 000038 xxland F0021C16 1 VAND vs0=vs34,vs35 16| 00003C xxlnor F0400511 1 VNOR vs34=vs0,vs0 17| 000040 bclr 4E800020 0 BA lr | Tag Table | 000044 00000000 00092000 00000000 0000000C | Instruction count 3 ===== EXPECTED OUTPUT: The two instructions should be combined.
Local fix
N/A
Problem summary
USERS AFFECTED: POWER8 vector users may be affected by this issue. PROBLEM DESCRIPTION: The compiler did not generate optimal vector code for POWER8 for the provided test case. It was generating 2 instruction sequences instead of 1 vector instruction.
Problem conclusion
The compiler has been improved to replace the 2 instruction sequences with only 1 vector instruction for the provided test case on POWER8.
Temporary fix
Comments
APAR Information
APAR number
IV68820
Reported component name
XL C/C++ FOR AI
Reported component ID
5725C7200
Reported release
C10
Status
CLOSED PER
PE
NoPE
HIPER
NoHIPER
Special Attention
NoSpecatt / Xsystem
Submitted date
2015-01-21
Closed date
2015-04-29
Last modified date
2015-04-29
APAR is sysrouted FROM one or more of the following:
APAR is sysrouted TO one or more of the following:
Fix information
Fixed component name
XL C FOR AIX
Fixed component ID
5725C7100
Applicable component levels
Document Information
Modified date:
19 August 2024