Flash BIOS update v1.45 - IBM IntelliStation Z Pro (9228)

Download Description

• New IBM xSeries firmware and device driver file naming convention
• Extracting and using .iso image files to create a CD-ROM disc

Severity: Suggested

BIOS Version 1.45

• Masked off m13err in the chipset. m13err is a recoverable error, there is no need to reboot the system when it occurs.

BIOS Version 1.44

• Fixed system hangs up at ck49 when SAS card is disabled.
• Fixed system hangs up with SAS card when automatic power restore is Previous State or Stay off.

BIOS Version 1.43

• Added Power On in BIOS startup options.
• Fixed the installation of mixed stepping processors causes BIOS to hang during POST.
• Fixed battery low 161 errors during POST (battery being drained due to active GPIO when standby power is applied).

BIOS Version 1.42

• Resolved the resource conflict with Intel PRO/1000 GT network card
• Adjust PCI-X Clock to 100MHz when 2 PCI-X Card exist in system

BIOS Version 1.41

• Resolved unknown PCI Device error for FX4500x2 and QuadroNVS 440 devices
• Include code to support new Intel Xeon Dual core E5100 Series G0 stepping level

BIOS Version 1.40

• Include the latest microcode patch for Woodcrest from Intel: SRV_P61.EXE. This BIOS flash image update contains an Intel errata patch to correct a possible processor marginality, resulting in unpredictable system behavior, such as machine check, system hang, blue screen, or kernel panic in Linux. The problem is industry-wide, the exposure is believed to be limited, but IBM strongly recommends that customers install this update as soon as possible to eliminate any exposures.
• For a specific configuration with greater than 2GB of RAM and both Nvidia FX3500 and FX1500 adapters installed in a system, 500MB of system memory is unusable. The BIOS was modified to make the 500MB of memory available in this configuration.
• When a x1 or x8 PCIe card is installed in slot #1 the system will not boot. The BIOS was modified to correct this issue which will allow x1 and x8 PCIe cards to be properly initialized and permit the system to boot.
• BIOS Configuration Setup was modified to allow the POST completion beep code to be disabled
• Updated the BIOS to include the latest memory initialization code.

BIOS Version 1.38

• Disabled the Processor Power Management in BIOS setup menu to prevent the system real time clock (RTC) from running too fast on NLD9 SP3 64bit.
• The chipset was improperly setup to handle a few specific correctable errors as uncorrectable errors. The correctable errors (specifically M1Err, M2Err, M4Err, M9Err) were reprogrammed as correctable to avoid the system reboot.
• For systems with one CPU the empty socket is disabled to prevent system display from going blank when booting Windows XP.
• When exiting setup configuration, customer could see an diamond shape character appeared on the display. The Setup code was modified to remove this anomoly.
• When running an internal IBM memory and PCI stress test, the system generated erroneous uncorrectable ECC errors in memory slot 4, 5 and 6. The BIOS code was modified to analyze and properly identify this type of false error.
• When both external LSI Winterhaven and an on-board LSI SAS controller were activated customers could see an 1801 error message on the display. The 1801 error is a result of having more options than the system can support. The BIOS setup menu was modified to allow customers to disable the option ROM scan on specific device slot which avoids the display of an 1801 error message. Customers can disable the ROM scan for adapters that are not required as a boot device to avoid the 1801 error message.
• When the system boots from a CDROM, the system diagnostics might detect an additional hard disk drive in system configuration. The BIOS was modified to correctly report disk information.
• The system failed to resume from stand by (S3) in AHCI mode. The problem was fixed by upgrading the AHPI driver to 5.6.2.1002 or later and storing AHCI BAR and AZALIA BAR during the stand by (S3) process.
• An internal IBM test team simulated a parity error on the PCI bus and found that the system did not properly identify the failing slot. The BIOS was modified to reboot the system, turn on PCI slot LEDs and log a SERR/PERR error message when it encounters the parity error to enhance the systems error isolation.
• The BIOS setup code was modified to indicate the CPU microcode revision in the processor summary menu.
• The BIOS was modified to automatically detect current chipset stepping levels and correctly initialize the chipset.
• The BIOS code included the latest MRC v1.10 patch to enhance the ECC failure rate of system memory DIMMs
• In previous BIOS, the system might incorrectly turn on the rear fan LED. This symptom usually occurred after clearing the system event log. The BIOS code was modified to fix this incorrect behavior and properly identify fan failures.
• If a customer presses any key except for "ENTER" in BIOS Setup menu:Security -> Administrator password, random characters could be displayed. The Setup code was modified to ignore invalid keys.
• Previous BIOS versions could falsly turn on the CPU error LED. The error handling code was improved to correctly idendtify CPU overheating problems.
• When removing both the power cord and the CMOS battery, the system did not report "161 Real Time clock battery error". The BIOS code was modified to enhance the CMOS failure analysis.
• Made changes to improve DMA Benchmark Performance with Leitch Quattrus Card.
• Some systems may loose their IDE Optical Drive (CD/DVD-ROM) after resuming from standby (S3). The system BIOS code was modified to properly restore IDE drives when resuming from standby.
• When multi-bit memory errors were injected in a sparing mode configuration, the system failed to respond correctly. BIOS was modified to properly reboot system, turn on system error LED, DIMM lightpath LED, memory LED and log the error in the system event log (SEL) when multi-bit memory errors event occurs.
• In previous BIOS, the system might have problem booting up when both an IBM internal test card and external video adapter card were installed. The BIOS code was modified to better manage the memory resources to prevent the boot hang from happening.
• An internal IBM test team simulating uncorrectable memory failures found that the system halted without any further error information. The BIOS code was modified to issue the error beep code 3-3-2 to indicate to customer that system has memory related problem.
• An internal IBM test team simulating correctable memory failures found that the system halted without any further error information. The BIOS was modified to process this type of error as a correctable error which avoids the hang.
• In previous BIOS, the system BIOS setting could be reset to default settings after customer updated the system to the new BIOS. The BIOS code was modified to fix the BIOS setting reset problem.

BIOS Version 1.30

• Initial release