Barrier-synchronization register

The barrier-synchronization register (BSR) is a memory register that is located on certain POWER® technology-based processors. You can write a parallel-processing application running on AIX® so that the application uses a BSR to perform barrier synchronization, which is a method for synchronizing the threads in the parallel-processing application. If you use the Hardware Management Console (HMC) to create logical partitions, you can divide BSRs into arrays and assign BSR arrays to partition profiles.

Each BSR array is 8 bytes long. The number of BSR arrays that are available on a managed system depends on the type of processors used on the server model. You can see the number of BSR arrays that are available on a managed system by viewing managed system properties on the HMC.

Using an HMC, you can assign a whole number of BSR arrays to one or more partition profiles. When you activate a logical partition using a partition profile that specifies a number of BSR arrays, the managed system assigns the BSR arrays to the logical partition if the specified number of BSR arrays are available. If the number of BSR arrays specified in the partition profile are not available, you cannot activate the logical partition using that partition profile.

The Integrated Virtualization Manager does not allow you to assign BSR arrays to logical partitions.

The HMC allows you to assign BSR arrays to any logical partition. However, AIX is the only operating system that currently supports the use of BSRs and BSR arrays. Also, you might not realize a performance advantage if you use barrier synchronization on a logical partition that uses shared processors.

You cannot add BSR arrays to or remove BSR arrays from logical partitions using dynamic partitioning. To add or remove BSR arrays, you must change the partition profile or create a partition profile with the revised number of BSR arrays, shut down the logical partition, and restart the logical partition using the partition profile with the new number of BSR arrays.

To take advantage of barrier synchronization, a parallel-processing application must be written specifically to access and write to the BSR or a BSR array.