slw or sl (Shift Left Word) instruction

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Purpose

Rotates the contents of a general-purpose register to the left by a specified number of bits and places the masked result in another general-purpose register.

Syntax

Bits Value
0 - 5 31
6 - 10 RS
11 - 15 RA
16 - 20 RB
21 - 30 24
31 Rc
PowerPC® 
slw RA, RS, RB
slw. RA, RS, RB
POWER® family 
sl RA, RS, RB
sl. RA, RS, RB

Description

The slw and sl instructions rotate the contents of the source general-purpose register (GPR) RS to the left N bits, where N is the shift amount specified in bits 27-31 of GPR RB, and store the logical AND of the rotated word and the generated mask in GPR RA.

Consider the following when using the slw and sl instructions:

  • If bit 26 of GPR RB is 0, then a mask of 32-N ones followed by N zeros is generated.
  • If bit 26 of GPR RB is 1, then a mask of all zeros is generated.

The slw and sl instructions each have two syntax forms. Each syntax form has a different effect on Condition Register Field 0.

Item Description
Syntax Form Overflow Exception (OE) Fixed-Point Exception Register Record Bit (Rc) Condition Register Field 0
slw None None 0 None
slw. None None 1 LT,GT,EQ,SO
sl None None 0 None
sl. None None 1 LT,GT,EQ,SO

The two syntax forms of the slw instruction, and the two syntax forms of the sl instruction, never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, these instructions affect the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

Item Description
RA Specifies target general-purpose register where result of operation is stored.
RS Specifies source general-purpose register for operation.
RB Specifies source general-purpose register for operation.

Examples

  1. The following code rotates the contents of GPR 4 to the left by 15 bits and stores the result of ANDing the rotated data with a generated mask in GPR 6: 
    
# Assume GPR 5 contains 0x0000 002F.
# Assume GPR 4 contains 0xFFFF FFFF.
slw 6,4,5
# GPR 6 now contains 0x0000 0000.
  2. The following code rotates the contents of GPR 4 to the left by 5 bits, stores the result of ANDing the rotated data with a generated mask in GPR 6, and sets Condition Register Field 0 to reflect the result of the operation: 
    
# Assume GPR 4 contains 0xB004 3000.
# Assume GPR 5 contains 0x0000 0005.
slw. 6,4,5
# GPR 6 now contains 0x0086 0000.
# Condition Register Field 0 now contains 0x4.