Program Status Word

The PSW (program status word) indicates your system's general status. There are six different types of system PSWs that provide diagnostic information. Each one has an old and new value. The PSWs are as follows:
  • Restart
  • External (EXT)
  • Supervisor call (SVC)
  • Program (PGM)
  • Machine-check (MCH)
  • Input/output (I/O).
The PSW format is described in detail in the ESA/390 Principles of Operation or z/Architecture Principles of Operation. The state of your system, whether it is waiting or processing, whether it can receive I/O interrupts or not, and the address of the next instruction to be executed are reflected in these parts of the PSW:
Bit 6
Indicates whether your system accepts (or is enabled for) input/output (I/O) interrupts. If this bit is set to 0, your machine is not enabled for I/O. If this bit is set to 1, your machine accepts I/O interrupts.
Bit 12
Indicates the architecture mode. It is 1 when in ESA/390 mode and 0 when in z/Architecture® mode.
Bit 14
Indicates whether your z/VM system is in a wait state. If this bit is set to 0, your system is not in the wait state, and processing can proceed normally. If this bit is set to 1, your system is in a wait state.

If bit 14 is set to 1, the setting of bit 6 usually1 indicates whether the wait state is enabled (1) or disabled (0).

Bits 64–127 (for z/Architecture mode) or 33–63 (for ESA/390 mode)
Contain the address of the next instruction your machine is set to process.

Examining the current PSW periodically may help you identify a loop. If the PSW instruction address always has the same value, or if the instruction address has a series of repeating values, the program probably is looping.

You can see the contents of the PSW by using the CP DISPLAY command with the PSWG option for z/Architecture (64-bit) mode or the PSW option for ESA/390 (31-bit) mode. You can also determine the PSW by looking at a dump.

1 Bit 6 can be set to 0 and bit 14 set to 1 without the CPU being in a disabled wait state. For example, this could occur if bit 7 is on and the program is waiting for an external interrupt.