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![]() Channel subsystem (CSS) Networking on z/OS |
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The heart of moving data into and out of a mainframe host is the channel subsystem, or CSS. The CSS is, from a central processor standpoint, independent of the processors of the mainframe host itself. This means that input/output (I/O) within a mainframe host can be done asynchronously. When an I/O operation is required, the CSS is passed the request from the main processor. While awaiting completion of an I/O request, the main processor is able to continue processing other work. This is a critical requirement in a system designed to handle massive numbers of concurrent transactions.
All LPARs within the central processor complex can make use of the channel subsystem.
A simplified example of how the channel subsystem functionally resides within a central processor complex is shown in Figure 1. In this diagram, the large box represents an entire mainframe processor (CPC). The asynchronous I/O is handled within the channel subsystem by a channel program. Each LPAR ultimately communicates using a subchannel. In addition, the channel subsystem can be used to communicate between LPARs. Each CPC has a channel subsystem. Its role is to control communication of internal and external channels to control units and devices. The channels permit transfer of data between main storage and I/O devices
or other servers under the control of a channel program. Some of the other
components in Figure 1 are
described as follows:
Control units One of the main tasks of the channel subsystem is to communicate with storage devices such as tape and direct access storage devices (DASD). This is facilitated by a control unit (which is not shown in Figure 1). Although this is a significant aspect of the channel subsystem, this will not be discussed within this information since it is not a network device. Logical channel subsystem (LCSS) To facilitate the usage of more CHPIDs, the mainframe architecture supports a logical channel subsystem, or LCSS. The LCSS is functionally identical to the channel subsystem, but up to four LCSSs can be defined within a central processor complex. CHPIDs are unique within the LCSS only; consequently, the 256 CHPID limitation can be overcome. |
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