Hardware data compression
The FlashSystem 900 small, medium, large, and extra-large flash modules support inline hardware data compression to increase the effective data capacity of the storage enclosure.
The FlashSystem compression algorithm features the following characteristics:
- There is no performance penalty, even for incompressible data.
- Compression is implemented completely in hardware – there is no processor intervention.
- The compression implementation takes advantage of existing Logical Structured Array (LSA) mapping.
Compression and decompression are performed on individual logical pages inside each flash module. Compression is the first step in the inbound data path before any logical-to-physical mapping occurs, so there is less data to transfer to the back end, making up for a small amount of added latency (7 µS). Incompressible data is detected and handled so that it consumes only 1:1 space. There is no metadata bloat due to existing LSA reuse. Compression and decompression are transparent external to the flash module except for space management. Performance scales linearly with the number of engines (each flash module has one or two engines, depending on the size of the module.)
The storage enclosure has multiple data protection mechanisms. Decompression occurs directly before returning the requested data, therefore there are no "store and forward" risks. Decompression is also performed as a check step in the inbound data path. After incoming data is compressed, it is run through the decompressor and checked against the original data. Finally, data protection (ECC) is implemented on top of the compressed data. This allows garbage collection and other background data transactions to operate on compressed data.